Senior Researcher - (Computing Architecture) - Switzerland We are looking for highly talented Senior Researchers for our new Computing Architecture Lab. Responsibilities: Explore new computing workloads, accelerate services, and improve performance, enhancing the system computing power of next-generation chips to build core competitiveness. Lead at least one of the following technological breakthroughs: XPU microarchitecture innovation research Be responsible for chip technology planning, So C architecture innovation and design, and participate in the end-to-end chip R&D process. Identify the latest technology trends and key technologies in the processor microarchitecture field, exploring and innovating technical breakpoints at the So C level. Participate in discussions and communications with global customers, capturing the latest microarchitecture evolution and processor chip technology trends in the industry, and be responsible for the technology layout in the processor domain. Requirements: Ph D or MSc in computer science or a related area to computer architecture, or equivalent research experience in industry. At least 3 years of relevant research experience in industry or academia. Proficiency in at least 3 of the following domains: Processor microarchitecture: Extensive experience in processor microarchitecture research and end-to-end development and design, in-depth understanding of processor So C, familiarity with chip technologies such as core, cache, No C, and memory, and leading processor So C design, feature design, and IP development are preferred. Accelerator technologies: Deep understanding of accelerator technologies and strong experience in innovation, design, and development of coprocessor design, neural network accelerator, FPGA accelerator, and ASIC accelerator design. Experience in FPGA chip design and development with a computing background and proficiency in the end-to-end development process of FPGA engineering. Experience in large-scale project delivery is preferred. Software and hardware performance optimization: Understand system software principles and existing mainstream acceleration technologies and ideas, with rich experience in performance optimization, HPC/AI acceleration, software and hardware collaborative optimization, software architecture design, and productization. Proficient in load characteristic analysis, modeling and simulation, and performance engineering. Familiar with chip microarchitecture, with the capability and experience of analyzing the performance of chips from top to bottom, and familiar with common profiling tools and performance engineering methodologies. Familiar with at least one software or hardware emulation tool, System C/Verilog programming experience, and able to use chip verification and emulation tools to verify the design or performance of new features. Excellent oral and written English.
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