Social network you want to login/join with: Senior Analog IC Layout Engineer with fin FET experience Client: Chipright Location:-Job Category:-Job Reference:8b58732b35e9 Job Views:9 Posted:21.01.2025 Expiry Date:07.03.2025 Job Description: Minimum 7 years experience in Analog IC Layout Experience working on High Speed Layout Experience working on speeds up to or past 25 Gb/sec Experience working on fin FET technology/TSMC down to 16nm
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